D. Ahn†, S. Ahn†, S. Lee, and T. Na*, “Area-efficient/low-power MRAM-PIM based on crossbar array utilizing ternary output,” in preparation.
S. Lee, D. Ahn, and T. Na*, “Digital-memory hybrid counter-based SRAM in-memory computing,” submitted to EL (under revision, major).
S. Lee, G. Lee, S. Ahn, and T. Na*, “Analysis of low area digital up/down clipping counter for digital in-memory computing,” IEEE Access, vol. 13, pp. 32808-32818, Jan. 2025. (SCIE) (Link)